A novel FPGA platform for ray tracing acceleration

This article presents a ray tracing acceleration system realized on FPGA platform, which fully utilizes the chip's potential under limited resources. Additionally we make global or local improvement to the architecture and algorithm, and achieve ideal ratio of performance against resources while insuring reliable operation. Such work will gain ray tracing more applicable regions as well as appraisals in theory and practice. The improving scheme includes acceleration module which creates spatial indexing hierarchy, parameterized ray generation module, premasking module, parameterized packet traversal module, arithmetic module and vector module.