Observing your Verilog-XL simulation from 30,000 feet: using high level views of simulations to improve debug productivity

Describes a method to improve simulation debugging throughput by the examination of simulation results at higher levels of abstraction than are generally used by most designers today. As ASIC designs become more and more complex, these kind of techniques will play an increasingly important role in the faster detection and repair of intricate problems within large design descriptions. This paper examines current debugging techniques and contrasts them to a debugging method utilizing higher-level views of simulations. Ways of creating these higher-levels views in Verilog today are discussed, together with a description of technology that can assist in this area. Examples of these views are also presented.