Ring Oscillator Technique for MOSFET $CV$ Characterization

A technique for extracting small signal MOSFET gate capacitance as a function of bias voltage from measurements of circuit delay and power is described. This approach makes use of a ring oscillator with stages in which an independent bias voltage is applied to the gates of MOSFETs driven by an inverter. The square wave signal circulating around the ring oscillator, at a reduced power supply voltage, serves as a small signal excitation for the $CV$ characterization. Gate charging times of order 40 ps enable capacitance measurement in the presence of the high parallel conductance of thin gate dielectrics. MOSFET parameters such as inversion and depletion capacitances and electrical channel length can be self-consistently compared with circuit power/performance, all derived as averages over hundreds of MOSFETs from the same test structure. This minimizes dependencies on layout, spatial and statistical variations, as well as other ambiguities that can exist when a variety of test structures is used to evaluate different MOSFET and circuit performance parameters. At $≪$1 MHz, the frequency divided output is compatible with standard in-line test. Data from experimental partially depleted silicon-on-insulator hardware at the 65-nm CMOS technology node are presented.