Analogue CMOS VLSI implementation of cellular neural networks with continuously programmable templates

This paper presents the CMOS realisation of a programmable cellular neural network. An analogue programmable synapse circuit was designed that allows a large dynamic range for the template weights. Tuning circuits transform the digital values specified by the user to the corresponding analogue tuning voltages. A chip containing a 4x4 programmable CNN has been fabricated in a 2.4 /spl mu/m CMOS process.<
>