An efficient algorithm for bipartite PLA folding

Programmable logic arrays (PLAs) provide a flexible and efficient way of synthesizing arbitrary combinational functions as well as sequential logic circuits. They are used in both LSI and VLSI technologies. The disadvantage of using PLAs is that most PLAs are very sparse. The high sparsity of the PLA results in a significant waste of silicon area. PLA folding is a technique which reclaims unused area in the original PLA. This paper proposes a column bipartite folding algorithm based on matrix representation. Heuristics are used to reduce the search space and to speed up the search processes. The algorithm has been implemented in C programming language on a SUN-4 workstation. The program was used to study several large PLAs of varying sizes. The experimental results show that in most cases the proposed algorithm finds optimal solution in a reasonable CPU time.<
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