High yielding self-aligned contact process for a 0.150-/spl mu/m DRAM technology

This paper describes improvements in the self-aligned contact process for 0.150 /spl mu/m and 0.175 /spl mu/m technology generations. Using a dynamic random access memory cell layout, we show that self-aligned contacts can be formed at 0.175 /spl mu/m ground rules and beyond by using a C/sub 4/F/sub 8/-CH/sub 2/F/sub 2/ chemistry. With the improved etch selectivity, gate cap nitride thickness can be reduced, resulting in a smaller aspect ratio for the gate etch, borophosphosilicate glass fill, and contact etch. With a rectangular contact, the area can be increased and the process windows for lithography and etch are improved. The process window for lithography increases by up to 40%, the aspect ratio for the etch and the contact fill is less, and the sensitivity to misalignment is reduced. The combination of rectangular contacts and C/sub 4/F/sub 8/-CH/sub 2/F/sub 2/ chemistry greatly enhances the product yield.