Designing a low cost, low noise programmable gain instrumentation amplifier

The capabilities of a very low cost technology, fully compatible with a standard n-well CMOS process, have been exploited in the design of a programmable gain instrumentation amplifier. Suitable low noise and compact layout characteristics have been achieved by using lateral pnp transistors in the input differential stage of the opamp which constitutes the basic building block of the circuit. This solution allows a unity gain bandwidth of 20 MHz and an equivalent voltage input noise of 6.6 nv//spl radic/Hz@1 kHz for the core op amp. Gain programmability is provided by a variable integrated resistor whose value can be selected by means of a digital control circuitry on chip.