Gate-Induced-Drain-Leakage Current in 45-nm CMOS Technology

Gate-induced-drain-leakage (GIDL) current in 45-nm state-of-the-art MOSFETs is characterized in detail. For the current technology node with a 1.2-V power-supply voltage, the GIDL current is found to increase in MOSFETs with higher channel-doping levels. In contrast to the classical GIDL current generated in the gate-to-drain overlap region, the observed GIDL current is generated by the tunneling of electrons through the reverse-biased channel-to-drain p-n junction. A band-to-band tunneling model is used to fit the measured GIDL currents under different channel-doping levels and bias conditions. Good agreement is obtained between the modeled results and experimental data. In addition, the dependence of the GIDL current on body bias, lateral electric field, channel width, and temperature is characterized and discussed.