Design of Cascaded Continuous-Time Sigma-Delta Modulators

Cascaded sigma-delta modulators implemented with continuous-time circuits are becoming popular due to its high potential to build high resolution, high bandwidth A/D converters. This paper shows a survey of the recent advances in this field. Architecture selection together with some design aspects are discussed for low oversampling ratio applications. The design of noise cancellation logic and the influence of integrator gain errors are also discussed. Finally some new challenges are proposed for next designs.