VLSI architectural synthesis for an acoustic echo cancellation application

An architectural synthesis tool dedicated to Digital Signal Processing, GAUT, is presented. Synthesis is achieved under both real time and silicon cost constraints. The algorithm is first described using a high level behavioral language. The control and data flow graph (CDFG) obtained is synthesized into processing control, memorization and communication units. These specifications are in VHDL, thus enabling the interconnection with CAD and simulation tools. An application of acoustic echo cancellation was synthesized, and it is show that the method may also be used to evaluate the complexity of various signal processing algorithms that satisfy the application constraints.<
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