A minimally redundant radix-4 systolic array for high performance IIR filtering

The authors consider the radix-4 implementation of a parallel multiplier accumulator suitable for performing recursive filtering. A new parallel multiplier is presented which exploits the minimally redundant radix-4 number representation to nearly halve the area of previous radix-2 design and provide a 20% speed advantage. The architecture supports fine grain pipelining and has a computation time which is independent of wordlength.<
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