An investigation into transistor-based adiabatic logic styles

Over the past decade, different adiabatic logic styles for low-power applications have been published. Due to the ever shrinking transistor sizes, devices are able to operate at lower potential differences. On the other hand, submicron technological phenomena like short-channel effect are gaining more influence in determining the behavior of devices. To account for these technological differences and advancements, this paper compares and analyzes the performance of various adiabatic logic styles in a uniform environment using a standard 0.18 /spl mu/m CMOS technology.