An Efficient MOS Transistor Model for Computer-Aided Design

This paper describes a dc model for MOS enhancement-mode transistors. The transport current and threshold voltage equations are simpler in form than many other models that are currently in use. This greatly eases the problem of extracting parameter values from measured data, since major parameters are directly related to process constants and secondary parameters follow from realistic approximations. The model has been successfully fitted to a high degree of accuracy to several NMOS and CMOS processes. When installed in a Computer-Aided Design (CAD) program, the model can substantially improve the execution time for circuit simulations.