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SECTION I

INTRODUCTION

AT PRESENT, in the production of GaAs microwave monolithic integrated circuits (MMIC), gold is traditionally used for the metallization of ohmic and barrier contacts, interconnects, air bridges and backside metallization of wafers [1]. Precious metals are not used in silicon technology where aluminium [2] was used previously and now copper [3] is being successfully applied for creating interconnects. Compared to gold, copper has higher thermal conductivity and lower resistivity, while both copper and aluminum are characterized by significantly lower costs [4]. Therefore, transition to metallization with the use of these metals in the manufacturing of GaAs MMIC should improve the performance characteristics, and reduce the cost of device manufacture. In addition, the development of industrial technology of Cu and/or Al based GaAs MMIC should facilitate the integration of GaAs and Si technologies and allow heterointegration through the use lines designed for the production of silicon MIC [5].

The disadvantages of the use of copper in GaAs technology include its high diffusion capacity and chemical activity, and the fact that copper is an acceptor impurity in GaAs and, when dissolved in an Formula$n$-type semiconductor, it reduces the conductivity of the material [6]. Diffusion barriers and passivation coating must be used to prevent diffusion of copper into GaAs, as well as its interaction with oxygen and other reactive media.

Currently, no GaAs MMIC industrial technology exists with Al and/or Cu metallization. This is largely due to the lack of knowledge on the subject. Most of the studies published to date are devoted to the development of technology for the production of separate elements of MMIC by using Cu metallization: ohmic and barrier contacts of transistors [7], [8], [9], [10], interconnects [11], [12], or backside metallization [13]. Studies [14], [15] address the issues of creating GaAs transistors with fully copper metallization.

Due to the high diffusion activity of copper, its use as a metallization material for the ohmic contacts and the transistor gate is not advisable. Aluminum, which does not have acceptor properties and is currently used successfully in production of pHEMT and mHEMT transistor gates [16], can serve as an alternative to copper. At the same time, the number of papers in which aluminum would be used for metallization of ohmic contact is very limited.

The aim of this work is to develop the low cost fabrication technology of GaAs pHEMT with Al based metallization of ohmic and barrier contacts and fully copper metalized interconnects, air bridges and backside metallization, and to study the electrical characteristics of transistors based on Al and Cu metallization.

SECTION II

EXPERIMENTAL

The experiments aimed at creating pHEMT used epitaxial structures AlGaAs/InGaAs/GaAs produced by molecular beam epitaxy. The heterostructure used in the experiments is described in [14].

The bilayer photoresist mask was formed after performing mesa isolation. Metallization of ohmic contacts based on Pd/Ge/Al/Ti was the deposited on the wafer by electron-beam evaporation at a residual pressure of less than Formula$1{\cdot}10^{-6}~{\rm Torr}$. Next, the pattern of ohmic contacts was formed by the lift off method. In order to form the ohmic contact, the samples were heat treated in an inert atmosphere at a temperature of Formula$T=200\hbox{--}450^{\circ}{\rm C}$ for Formula$t=1\hbox{--}20~\min$.

The T-shaped gate transistor with 150 nm foot length was formed by electron beam lithography as described in [14]. Metallization of the T-shaped gate based on the Ti/Al/Ti compositions was performed by electron-beam evaporation at a residual pressure of less than Formula$1{\cdot}10^{-6}~{\rm Torr}$. The gate pattern was formed by the lift off method.

A 150–200 nm layer of Formula${\rm Si}_{{\rm x}}{\rm N}_{{\rm y}}$ was deposited on the wafer in order to passivate the surface of the transistors. Dielectric deposition was carried out by deposition from the gaseous phase in ICP plasma. The windows in the Formula${\rm Si}_{{\rm x}}{\rm N}_{{\rm y}}$ film were then opened by reactive ion etching.

To create the interconnections, a bilayer resistive mask was formed on the surface of the wafer, onto which the metallization of the first level of interconnects based on Mo/Cu/Mo was deposited by the electron beam evaporation method. The Mo films were used as diffusion barriers for Cu.

The air bridges were formed by electroplating of a copper film from aqueous solution of Formula${\rm CuSO}_{4}+{\rm H}_{2}{\rm SO}_{4}$. To start, the first resistive mask was formed on the substrate. After developing, in order to smooth the profile of the resist, the substrate was heat treated at Formula$T=120^{\circ}{\rm C}$ for Formula$t=15\min$. The conductive sublayer based on Ti/Cu was then deposited by two-layer metallization using electron beam evaporation. A 3 Formula$\mu{\rm m}$ Cu film was deposited after forming the second resistive mask. Then, in sequence, the second resistive mask was removed from the wafer surface, the Cu and Ti films were selectively etched, and the first resistive mask was removed.

Final passivation was conducted in two stages. In the first stage, a layer of Formula${\rm Si}_{{\rm x}}{\rm N}_{{\rm y}}$ was deposited on the wafer surface; in the second, a 5 Formula$\mu{\rm m}$ thick layer of photosensitive BCB was applied by centrifuging. After opening the windows in the BCB film, the wafer was heat treated. Then, following the pattern in the BCB film, windows were opened to the contact pads in the Formula${\rm Si}_{{\rm x}}{\rm N}_{{\rm y}}$ film.

The wafer was next glued to a sapphire carrier and thinned from the back side to a thickness of 100 Formula$\mu{\rm m}$. The via holes were etched by reactive ion etching in ICP plasma. After removal of the resistive mask, layers of W/Cu were formed by magnetron sputtering on the backside surface of the wafer. Then, a 3 Formula$\mu{\rm m}$ thick Cu film was formed by electrochemical deposition.

In the final stage, the wafer was removed from the sapphire carrier and its surface was cleaned of the resist and glue.

The external appearance and surface morphology of the transistor elements were investigated by electron microscopy. DC parameters of the produced transistors were measured by HP4156A Semiconductor Parameter Analyzer, and the microwave signal parameters by the ZVA-40 Vector Analyzer. The output power of the transistors was measured with the Load Pull method with use of Focus Microwave tuners on the Cascade Microtech probe station.

SECTION III

RESULTS

A. Aluminium Metalized Ohmic Contacts to Formula$n^{{+}}$-GaAs

Fig. 1 shows the specific contact resistance Formula$\rho$ of the ohmic contacts based on Pd/Ge/Al/Ti as a function of the annealing temperature in an inert atmosphere.

Figure 1
Fig. 1. Specific contact resistance Formula$\rho$ of the ohmic contacts based on Pd/Ge/Al/Ti to Formula$n^{+}$-GaAs Formula$(n=5{\cdot}10^{{18}}~{\rm cm}^{{-3}})$ as a function of the annealing temperature in an inert atmosphere.

Fig. 1 shows that the variation in the value of specific contact resistance of the Pd/Ge/Al/Ti ohmic contacts as a function of the annealing temperature in the range of Formula$T=200\hbox{--}450^{\circ}{\rm C}$ is represented by a characteristic curve with a minimum. The contact reaches a minimum value of contact resistance Formula$\rho=1.3{\cdot}10^{{-6}}~{\rm Ohm}{\cdot}{\rm cm}^{{2}}$ after heat treatment at Formula${\rm T}=250^{\circ}{\rm C}$. Further increase in heat treatment temperature leads to a monotonic increase in the value of Formula$\rho$. The reached minimal value of the specific contact resistance is an optimal for high electron mobility transistor performance. But the optimization of Pd, Ge and Al films thickness ratio may be reduce the value of Formula$\rho$.

Fig. 2shows the microscopic images of the Pd/Ge/Al/Ti ohmic contact surface after thermal annealing at Formula$T=250$ (a) and 450°C (b) in an inert environment. Pd/Ge/Al/Ti-based contact shows smooth surface morphology throughout the range of annealing temperatures.

Figure 2
Fig. 2. SEM images of Pd/Ge/Al/Ti ohmic contact surface after thermal annealing at 250 °C (a) and 450°C (b) in an inert environment.

Results of these experiments demonstrate the promise of using Pd/Ge/Al/Ti-based ohmic contacts in the GaAs transistor fabrication technology.

B. Fabrication of GaAs pHEMT With Copper Based Air Bridges and Backside Metallization

Fig. 3 shows a microscopic image of the cross section of a GaAs pHEMT transistor with Pd/Ge/Al/Ti ohmic contacts and 150 nm Ti/Al/Ti based T-shape gate.

Figure 3
Fig. 3. Cross section SEM image of a transistor with Pd/Ge/Al/Ti ohmic contacts and 150 nm Ti/Al/Ti based T-gate.

Fig. 4 shows the microscopic images of the transistor after the formation of Cu air bridges.

Figure 4
Fig. 4. SEM image of the transistor with Cu air bridges.

The air bridges have smooth surface morphology and the resistivity of the deposited Cu film was 1.8 Formula$\mu~{\rm Ohm}{\cdot}{\rm cm}$.

Fig. 5 shows the microscopic images of the test transistor after opening the windows in the Formula${\rm BCB}/{\rm Si}_{{\rm x}}{\rm N}_{{\rm y}}$ windows to the contact areas (a) and cross-sectional SEM view of the transistor (b).

Figure 5
Fig. 5. Optical microscopy image of the transistor with open windows in the Formula${\rm BCB}/{\rm Si}_{{\rm x}}{\rm N}_{{\rm y}}$ to the source, drain and gate areas (a) and cross section SEM image of the transistor (b).

Window to the contact pads of the transistor have straight edges (Fig. 5(a)). The BCB film has smooth morphology, indicating good planarization of the surface (Fig. 5(b)).

Fig. 6 shows a cross section microscopic image of a via hole after the formation of the copper backside metallization of the wafer.

Figure 6
Fig. 6. Cross section SEM image of a copper metalized via hole.

It can be seen that the Cu film covers the surface of the wafer and the hole with a uniform layer and has smooth morphology. The measured electrical resistance of the via hole metallization was less than 0.05O hms.

C. Copper Metalized GaAs pHEMT Performance

Figs. 7 and 8 show the DC and RF performance of GaAs pHEMT transistors fabricated using Al-metalized ohmic and barrier contacts and Cu based air bridges and backside. The summary width of the transistor gates of the tested transistors was 600 Formula$\mu{\rm m}$.

The transistors have a drain-source saturation current Formula$I_{dss}=280~{\rm mA}/{\rm mm}$, maximum transconductance Formula$g_{{\rm m}}=450~{\rm mSm}/{\rm mm}$ at Formula$U_{ds}=1.5~{\rm V}$(Fig. 7).

Figure 7
Fig. 7. Transfer characteristics of GaAs pHEMT with Al-metalized ohmic and barrier contacts and Cu based air bridges and backside.
Figure 8
Fig. 8. Measured current gain (1) and masons gain (2) of pHEMT as a function of frequency.

The current cut off frequency was 80 GHz at Formula$Uds=1.5~{\rm V}$ and Formula$U_{gs}={-}{0.35}~{\rm V}$, the power gain limiting frequency was 100 GHz (Fig. 8).

Fig. 9 shows the relationships of the transistor' s output power and gain with matched input and the output load a impedance. The measurements were carried out at Formula$U_{{\rm ds}}=8~{\rm V}$, Formula$I_{ds}=1/3$Formula$I_{{\rm dss}}$ at a frequency of 12 GHz. Output power at 1 dB gain compression was Formula$P_{{\rm 1 db}}=26~{\rm dBm}$ or 670 mW/mm at an efficiency level of about 28% and gain Formula$G=11~{\rm dB}$.

Figure 9
Fig. 9. PHEMT output power and gain factor with matched input and output load a impedance.

It should be noted that the parameters of the newly-developed transistor were similar to those of transistors with conventional Au metallization of the ohmic and barrier contacts, interconnects, air bridges and backside. The obtained results demonstrate the promise of Al and Cu metallization in the manufacture of microwave transistors and MMICs.

SECTION IV

CONCLUSION

In this study, technology has been developed and GaAs pHEMT were fabricated based on Al and Cu metallization. The newly-developed transistors exhibited a source-drain saturation current of Formula$I_{dss}=280~{\rm mA}/{\rm mm}$ and a maximum transconductance of Formula$g_{m}=450~{\rm mS}/{\rm mm}$ at Formula$U_{ds}=1.5~{\rm V}$; current cut off frequency for transistors with 600 Formula$\mu{\rm m}$ total gate width was 80 GHz at Formula$Uds=1.5~{\rm V}$ and Formula$U_{gs}={-}{0.35}~{\rm V}$; the power gain limiting frequency was 100 GHz. Output power at 1 dB gain compression was Formula$P_{{\rm 1 db}}=26~{\rm dBm}$ or 670 mW/mm at an efficiency level of about 28% and the transistor gain Formula$G=11~{\rm dB}$. Measurements were performed at Formula$U_{ds}=8~{\rm V}$, Formula$I_{ds}=1/3I_{{\rm dss}}$ at a frequency of 12 GHz.

The fabricaed transistors had the similar DC and RF performance to the conventional gold based devices but have the lower cost of device manufactore.

The obtained results demonstrate the promise of Al and Cu metallization in the manufacture of microwave pHEMT and monolithic integrated circuits on their basis. The reliability of fabricated copper metalized devices will be investigated in the future work.

ACKNOWLEDGMENT

The authors would like to thank the staff of the Microelectronics Department of Micran Research and Production Company and the Research and Education Nanotechnology Center of Tomsk State University of Control Systems and Radioelectronics for their useful discussions and assistance with the work.

Footnotes

This work was supported by the Ministry of Education and Science of the Russian Federation under Contract 13.G25.31.0011, in pursuance of Resolution No. 218 of the Government of the Russian Federation. The review of this paper was arranged by Editor M. Anwar.

The authors are with the Microelectronics Department, Research and Production Company “Micran,” Tomsk 634045, Russia (e-mail: erofeev@sibmail.com; vak@micran.ru; arykov@micran.ru; aev@micran.ru; ishutkin@micran.ru; kazimirov@micran.ru).

Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org.

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Authors

Evgeny V. Erofeev

Evgeny V. Erofeev

Evgeny V. Erofeev received the bachelor's degree in electronic engineering from the Department of Physical Electronics, Tomsk State University of Control Systems and Radioelectronics, Tomsk, Russia, in 2006, and the Ph.D. degree in 2012.

From 2006 to 2009, he was with the Research Institute of Semiconductor Devices as a Process Engineer in evaporation sector. In 2009, he joined Micran, Research & Production Company. He is currently a chief of MMIC laboratory. He is a specialist in electron-beam lithography techniques and equipment, in evaporation of metals and Cu-based metallization and ohmic contacts. His current research interests include Cu metallized III-V devices, high voltage GaN devices for switching applications. He is the author of 60 publications in refereed journals and 10 patents.

Vadim S. Arykov

Vadim S. Arykov

Vadim S. Arykov received the bachelor's degree in electronic engineering from Tomsk State University of Control Systems and Radioelectronics, Tomsk, Russia, in 2003.

From 2003 to 2009, he was involved in development of self-aligned technology fabrication process of GaAs MESFETs in the Research Institute of Semiconductor Devices. In 2009, he joined Micran, Research & Production Company, where he is a Principal Constructor in Microelectronics department. His current research interests include development of GaAs diodes, MESFET, pHEMT and mHEMT technology processes.

Ekaterina V. Anishchenko

Ekaterina V. Anishchenko

Ekaterina V. Anishchenko received the bachelor's degree in chemistry from Tomsk State University, Tomsk, Russia, in 1996.

From 1996 to 2009, she worked with the Federal Research Institute of Semiconductor Devices. In 2009, she joined Micran, Research & Production Company. She is currently a chief of Laboratory of lithography, chemistry and electrochemistry. She is a specialist in technology of fabrication GaAs MMICs, in photolithography and electron-beam lithography. Her current research interests include development of GaAs pHEMT and mHEMT technology processes.

Valery A. Kagadei

Valery A. Kagadei

Valery A. Kagadei received the bachelor's degree in electronic engineering from Tomsk State University of Control Systems and Radioelectronics, Tomsk, Russia, in 1985, the Ph.D. degree in 1994, and the Dr. of Science degree in 2005.

He is currently with Micran, Research and Production Company, as a Deputy Director. He is a specialist in technology of fabrication GaAs MMICs, in generation of charged and neutral low-energy beams and physics of particles and solid interaction. He has authored over 150 publications. He holds one USA patent, nine inventor's certificate, and patents of USSR and Russia.

Sergey V. Ishutkin

Sergey V. Ishutkin

Sergey V. Ishutkin received the master's degree in electronic engineering from the Department of Physical Electronics, Tomsk State University of Control Systems and Radioelectronics, Tomsk, Russia, in 2009, and is currently pursuing the Ph.D. degree.

Since 2009, he has been working with Micran, Research and Production Company. He is a specialist in electron-beam lithography and other techniques and equipment, in ohmic contacts for GaAs MMICs and electrochemistry of Cu. His main research interests include fully Cu metallized MMIC based on pHEMT transistors.

Artyom I. Kazimirov

Artyom I. Kazimirov

Artyom I. Kazimirov received the master's degree in electronic engineering from the Department of Physical Electronics, Tomsk State University of Control Systems and Radioelectronics, Tomsk, Russia, in 2010 and is currently pursuing the Ph.D. degree.

He is the author or coauthor of 14 publications in refereed journals. His current research interests are focused on search and research of new materials for micro- and nanoelectronics needs.

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