IP for embedded robustness

The following topics are dealt with: formal verification of designs; cooling layout; power analysis; SAT; BDD; interconnects; low power design; advanced mixed signal testing; collaborative design; logic synthesis; SoC; symbolic techniques; EDA tools; platform based design; analogue simulation; asynchronous circuits; BIST; network on chip; modelling; embedded systems; reconfigurable architectures; test resource partitioning; deep submicron design; logic synthesis; buffering; automatic design; object oriented systems; real time systems; online testing; fault tolerance; design space evaluation; architectural level synthesis; memory testing; high level synthesis; coupling and switching noise; and power optimisation.