Difference metric soft-output detection: architecture and implementation

The forward-backward (FB, also known as the MAP or BCJR) detection algorithm provides "soft" reliability estimates for each bit that it decodes. This paper presents a VLSI architecture for soft-output forward-backward detection of Class-IV partial response signaling (PR4) used in magnetic recording. A difference metric version of the FB algorithm is derived. A novel low-complexity architecture implements the computational kernel as a limiter. A 0.35-/spl mu/m 3-level metal CMOS ASIC was implemented and verified to operate at 20 MHz (20 Mbps), the highest speed of our IC tester. Simulations predict operation of up to 150 Mbps.