Analysis of the dynamic behavior of a charge-transfer amplifier

Charge transfer amplifiers (CTAs) have recently emerged as a topic of interest in low-power data converter applications. Due to the clocked phase operation, a CTA's dynamic performance is difficult to analyze and to optimize. This paper provides an analysis of the dynamic behavior of a recently reported charge transfer amplifier intended for analog-to-digital converter (ADC) application. Results of the analysis are verified by SPICE simulations and by characterization data taken from 0.6 /spl mu/m CMOS test cells.