FinFET With High- $\kappa $ Spacers for Improved Drive Current

We demonstrate p-channel gate-source/drain underlapped silicon FinFET with HfO
₂
high-
$\kappa $
spacer and compare it with its counterpart having SiO
₂
low-
$\kappa $
spacer. The HfO
₂
spacer structure reduces series resistance in the underlap regions due to the large capacitive coupling between the gate and the underlap regions. Both drain current and transconductance of p-channel FinFET are higher than those of the SiO
₂
spacer device by about
$3\times $
when biased in the saturation region, and about
$1.6\times $
and
$2\times $
, respectively, when biased in the linear region. Subthreshold swing and drain-induced barrier lowering are also improved by incorporating the HfO
₂
spacer.