A Measurement Method on Nanoscale Thickness of the Ti Barrier Layer of TSV Structure for 3-D IC

As the characteristic dimension of an integrated circuit (IC) continuously scales down, together with the requirements of low power consumption, multiple functionality, and cost effectiveness, the conventional IC transforms into a 3-D IC. Through-silicon via (TSV) is a promising and preferred way to realize the reliable interconnection for a 3-D IC. Thus, accurate measurement of the critical structural parameters plays an important role in securing the integrity and reliability of TSV. In this paper, a novel image-processing-based measurement method is proposed to measure the barrier layer thickness and step coverage of TSV. Since the thickness of the barrier layer is generally less than 100 nm, which is a drawback of the conventional SEM method, we used the material information from SEM as well as structural prior of TSV to infer the barrier layer thickness on nanoscale. In addition, we further achieved the step coverage of thin films in TSV using the proposed measurement method.