Fast Thermal Simulation of FinFET Circuits Based on a Multiblock Reduced-Order Model

A methodology for fast and accurate thermal simulation of integrated circuits (ICs) is presented based on a multiblock reduced order modeling approach. The model projects the heat equation from a physical domain onto a functional space to represent the thermal solution using a small number of degrees of freedom (DOFs). The approach requires no assumptions about the physical geometry, dimensions, boundary conditions or heat flow pathways, as is usually needed for compact or lumped thermal models. The developed multiblock thermal model is applied to FinFET device/circuit structures including a three-block circuit structure consisting of several NAND gates. The model is verified on multiblock structures against a detailed numerical simulation (DNS). It is shown that the developed multiblock model gives accurate thermal solutions for a multiblock IC structure subjected to power pulse excitations whose pulse frequency, width, shape, and shift in time substantially deviate from those used in model construction. In general, the approach offers accurate thermal solutions as detailed as a DNS with a reduction in the numerical DOF by 5 to 6 orders of magnitude.