Graph Coverage: An FPGA-targeted implementation

Classification systems specifically designed to deal with fully labeled graphs are gaining importance in many application fields. The main computational bottleneck in such systems is the dissimilarity measure between pairs of graphs. In this paper we propose to accelerate in hardware such computations, relying on the Graph Coverage as the core inexact graph matching procedure, targeting the design to FPGA as an inexpensive way to design specific co-processing devices. A comparison in terms of computational time between the proposed system and a software implementation on a standard workstation shows encouraging results.