A 250-MHz 18-Mb full ternary CAM with low voltage match line sense amplifier in 65nm CMOS

An 18Mb full ternary CAM with low voltage match line sense amplifier (LV-MA) is designed and fabricated in 65-nm bulk CMOS process. The die size is 99.06 mm. The proposed LV-MA reduces the dynamic power consumption of match-lines to 33% compared to conventional one and realizes 42 % fast match-line sensing. The power consumption of fully paralleled search operation at 125-MHz is 5.1 W, which is 63% smaller than previous work. At 1.0V typical supply voltage, the 250-MHz search frequency is achieved.