Next generation transition liquid phase sintering pastes for Z-Axis interconnection in sub-400 micron pitch high density interconnect

Paste-filled-via interconnects were introduced to the electronics packaging industry in the mid 1990's. Since then, implementation of paste interconnection has grown to encompass a number of different package architectures. Transient liguid phase sintering (TLPS) pastes are a unigue family of paste materials that form a continuous metallurgically alloyed pathway from the upper pad, through the bulk of the paste in the via, to the lower pad during a standard lamination cycle. The TLPS alloying reaction produces an interconnect that is highly electrically and thermally conductive and robust enough to withstand multiple lead-free solder reflow cycles. In North America, the primary implementation has been in complex PCBs where the circuit board is built as a number of sub-cores that are then interconnected in a single lamination with TLPS pastes in vias laser ablated into prepreg or adhesive layers applied to the sub-cores. The second type of architecture that most benefits from a TLPS z-axis interconnection strategy is HDI for mobile electronic products. The high reliability, stackability and anywhere, any layer placement of TLPS-paste vias enables very high density, thin, lightweight designs. To fully exploit this market segment; however, the TLPS interconnect strategy must provide a pathway to achieve sub 400 micron pitch designs and via sizes below 125 micron. While the existing TLPS paste technology is capable of addressing some of this segment, next generation materials will be needed. Newly developed TLPS pastes with very high metal loading - a 30% volumetric improvement over the previous generation - offer lower and more consistent electrical resistivity, higher strength to withstand expansion in the z-axis, a dense fill in via sizes as small as 50 micron, and improved resistance stability in thermal cycling of daisy chain constructions.