Design and Analysis of Digital-Assisted Bandwidth-Enhanced Miller Divider in $ {\hbox {0.18-}}\mu{\hbox {m}}$ CMOS Process

A bandwidth-enhanced technique for a Miller divider is presented in this paper. The proposed frequency divider consists of a band-switched Miller divider and digital-assisted circuit to switch the resonator automatically. The proposed frequency divider is implemented in 0.18-μm CMOS technology and has a measured 57.4% bandwidth from 8.2 to 14.8 GHz at an input power of 0 dBm. The dc consumption is 12 mW. Compared to the previously reported Miller dividers, the proposed circuit achieves the widest fractional bandwidth.