Harmonic Distortion Optimization of Cascaded H-Bridge Inverters Considering Device Voltage Drops and Noninteger DC Voltage Ratios

This paper considers achieving the minimum total harmonic distortion (THD) or frequency-weighted THD (WTHD) of the staircase-modulated output voltage of single-phase multilevel inverters, with or without elimination of the lowest order harmonics. The minimal THD values, together with the corresponding step angles and dc voltage source ratios, have been obtained for the 5-, 7-, 9-, 11-, and 13-level cases; accounting for the device voltage drops when the load is resistive or is moderately inductive is described. Similarly, the minimal WTHD values, together with the corresponding step angles and dc source voltage ratios, have been obtained for the five-, seven-, and nine-level waveform cases. The results show that requiring harmonic elimination leads to larger W/THD than the minimum W/THD that can be achieved without this requirement. Furthermore, a 13-level waveform is needed to attain a voltage THD less than 5%, and a nine-level waveform is needed to attain a WTHD less than 0.5%. Experimental measurements are presented as verification of the analytical results.