Design and Analysis of a Self-Oscillating Class D Audio Amplifier Employing a Hysteretic Comparator

A third-order self-oscillating class D audio amplifier that utilizes a hysteretic comparator is presented. The design is analyzed and its THD is theoretically determined by employing an equivalent model, that relates the approach to natural sampling pulse-width modulation. The architecture eliminates the requirement for a high-quality carrier generator. A low-cost hysteresis compensation technique is utilized to enhance distortion performance at high output power levels. An implementation is presented in a 0.7
$\mu\hbox{m}$
CMOS process. It achieves a dynamic range (DR) of 116.5 dB, and a THD+N of 0.0012%, while delivering a power of 125 mW into an 8
$\Omega $
load at 1 kHz. The THD+N is under 0.006% up to 90% of the maximum output power. The amplifier can deliver 1.45 W into the load with a THD of 5% with a 5 V power supply. The efficiency is greater than 84% for output power larger than 1 W . The area of the amplifier is 6
${\hbox{mm}}^{2}$
.