Defectivity readiness for immersion scanner qualification towards 32nm production

The never ending drive towards smaller design rules requires continuous creation and monitoring of the defect base line. The following paper describes collaborative work between the wafer inspection division at Applied Materials and ASML, addressing the challenges and providing solutions towards 32nm node wafers printed with immersion lithography. Using ASML's 45 nm test wafers, sensitivity and classification requirements for 32nm were evaluated using Applied Bright Field wafer inspection and SEM review tools. We propose a method to calibrate inspection and review tools for the detection of 32nm related defects, both systematic (designed mask defects matrix that spans different defect types and sizes) and random.