Ultra-scaled III–V Quantum-Well Field Effect Transistor for THz and post-Si-CMOS digital applications

Recently, III-V quantum-well field effect (QWFET) Transistors have emerged as the most potential technology of choice for future Tera-Hz and next generation high-speed, lowvoltage logic applications beyond Si-CMOS technology. In fact, the excellent RF-performance has been demonstrated using InAlAs/In
_x
Ga
_1-x
As HEMTs on InP substrate. This paper presents the fabrication of the nano-scale high performance In
_x
Ga
_1-x
As-channel QWFETs and the evaluation of QWFETs for RF and low-power logic applications. Superior drain-source current density of 1015 mA/mm was achieved with an extremely high transconductance (g
_m
) of 1900 mS/mm when the drain voltage (VDs) was biased at 0.5 V, it indicated that the In-rich In
_x
Ga
_1-x
As-channel QWFETs can be biased at a low supply voltage to reduce overall dc power consumption, while maintaining relatively high current density and g
_m
. For the logic characteristics, a low calculated gate delay of 0.54 psec was also achieved at 0.5 V drain bias due to the superior transport properties of the InAs channel. The drain induced barrier lowering (DIBL) and subthreshold slope (SS) were calculated to be 200 mV/V and 115 mV/dec, respectively.