Parallel Three-Phase Inverters: Optimal PWM Method for Flux Reduction in Intercell Transformers

Parallel multilevel converters are now widely used in the industry, particularly in high-current applications such as voltage regulator modules. The reduction of the output current ripple and the increase of its frequency are possible due to the use of interleaving techniques and, as a consequence, the filters associated with the converter may be reduced. The current ripple reduction in each commutation cell of a parallel converter is possible by the use of intercell transformers (ICT). The design of such a special magnetic component depends very strongly on the magnetic flux flowing through their cores. In three-phase systems coupled by ICTs, the injection of zero-sequence signals in the output voltage reference changes this flux. The aim of this paper is to explain the influence of the most popular pulse width modulation (PWM) methods regarding the ICT flux for applications to three-phase loads. An optimal PWM method that minimizes the size of the ICT design is developed. Experimental results verify the analysis presented in this paper and validate the flux reduction provided by the developed optimal zero-sequence signals.