Parasitic Compensation Design Technique for a C-Band GaN HEMT Class-F Amplifier

A class-F/inverse class-F load circuit design method that includes parasitic elements such as drain-source capacitance and bonding wire inductance has been developed. For the class-F load circuit design, a reactance function which has zeros at even harmonic frequencies and poles at odd harmonic frequencies is expanded to an -ladder circuit including parasitic elements through the use of the second Cauer canonical form. For the inverse class-F load circuit design, the zero points and the poles are exchanged. One stage of the -ladder circuit can be approximately replaced to a distributed circuit element for higher frequency operation. The proposed method allows parasitic compensation up to an arbitrary harmonic order by adding zeros and poles. Additionally, if distributed circuit elements are used, the method also compensates frequency dispersive characteristics of microstrip lines. According to the proposed method, a class-F amplifier using an AlGaN-GaN HEMT has been fabricated at 5.8 GHz. The fabricated class-F amplifier delivered high efficiency characteristics, with a maximum drain efficiency of 79.9%, a maximum power-added efficiency (PAE) of 71.4%, and an output power of up to 33.4 dBm at 5.86 GHz.