Separate Extraction of Source, Drain, and Substrate Resistances in MOSFETs With Parasitic Junction Current Method

The separate extraction of asymmetric source (
R
_S
) and drain (
R
_D
) resistances caused by the variations in the layout, process, and device degradation is important in the practical modeling and characterization of MOSFETs and their integrated circuits. We propose a simple “parasitic junction current method” (PJCM) for the separate extraction of
R
_S
,
R
_D
, and
R
_SUB
(substrate resistance) in MOSFETs. We applied the proposed PJCM to n-channel MOSFETs with different
W
/
L
combinations and verified its usefulness in the robust extraction of
R
_S
,
R
_D
, and
R
_SUB
.