A combined packet and circuit switching routing algorithm for networks-on-chips

A new dynamic switching theme is proposed for networks-on-chips to provide adaptive routing to guarantee a lower packet latency at different injection rates. Router architecture and packet format are developed to support our routing algorithm. Modeling of the router and the routing algorithm was done using SystemC and applied on 2-D mesh network. A new combined switching mode is proposed that dynamically at run time switches any path from a shared to a dedicated path. Simulation of the combined switching mode against the packet switching mode is performed. Results show that the packet latency is lowered by 11% compared to packet switching .