Improving Solder Joint Reliability of WLP by Means of a Compliant Layer

The common structure of a Wafer Level Package (WLP) has direct under-bump-metallization (UBM) and solders bumps attached to a silicon chip. These WLP solder joint connections have a relatively low structural compliance to the silicon chip. Studies have shown that low structural compliance typically result in issues with solder joint reliability and shorter fatigue life under thermal cyclic loading (TMCL). However, the reliability of such WLP assemblies can be improved by introducing a layer of low modulus-based material in between the chip and the UBM/solder bump, also known as a compliant layer. This paper studies the reliability of one instance of a WLP with a compliant layer during TMCL. This study was performed via finite element (FE) modeling and then compared with experimental results.