Implementation of an All-Optical Time-Slot-Interchanger Architecture

We demonstrate a wavelength-converter-based optical time-slot-interchanger. It consists of three cascaded programmable delay stages and employs the first hybrid integrated, on a chip, quadruple array of semiconductor optical amplifier Mach-Zehnder interferometer switches. It exhibits error-free operation with 10-Gb/s nonreturn-to-zero packets and a power penalty of 1.8 dB.