Lithography Challenges toward Nano Scaled Device

Lithography has been eagerly explored into nanoscale beyond sub-micrometer in the fields of leading-edge technology applications. NNFC (National NanoFab Center) has specially concentrated on direct electron beam lithography and nanoimprint which are flexible and effective methods to be applicable to sub-100 nm patterning. Nanoscaled FinFET and MRAM(magnetic RAM) were evaluated, using hybrid e-beam lithography (double masking method, mix & matching method), i.e. optical exposure tool used to reduce the total patterning time of direct electron beam. The results from these patterning methods were able to fabricate the world's smallest transistor, 5 nm FinFET and to adapt new material and device structure to magnetic device. Also 50 nm (line & space) fabrication capability of UV imprint template (stamp in UV nanoimprint) is demonstrated in this paper.