A Low Noise Figure 1.2-V CMOS GPS Receiver Integrated as a Part of a Multimode Receiver

This paper presents the designed and measured performance of a Global Positioning System (GPS) receiver chain integrated as a part of a multi-band and multimode receiver, designed for global system for mobile communications (GSM) and wideband code division multiple access (WCDMA). Adding an additional mode to a receiver with minor changes to the implementation is discussed. The IC is implemented in a 0.13-μm CMOS technology without any analog options. At 1.2-V supply voltage and total power dissipation of 49 mW for the analog signal path, the proposed GPS receiver features a noise figure of 2.2 dB.