Analysis and Measurement of Signal Distortion due to ESD Protection Circuits

Electrostatic discharge (ESD) protection circuits typically contain a significant amount of nonlinear capacitance. At high frequencies and large amplitudes, this nonlinearity can degrade the signal integrity at the input pins of high performance mixed signal ICs, such as analog-to-digital converters (ADCs). This study provides a theoretical analysis of this problem as well as experimental results that quantify typical distortion levels introduced by state-of-the-art ESD structures. It is shown that with distortion targets nearing
$- hbox100~dBc$
at signal frequencies on the order of 100MHz, ESD circuits will become a limiting factor in the future. In addition to these results, this study offers some brief guidelines for designing ESD protection circuits suitable for high-speed, high-linearity applications.