Efficient external memory segment intersection for processing very large VLSI layouts

One fundamental problem that arises in VLSI layout analysis and verification is the segment intersection problem: given a set of segments in the plane, find all pairwise intersections. This problem has been widely studied in the Computational Geometry. One problem with processing large VLSI layouts is that the data to be processed may be far too massive to fit in main memory. When dealing with data sets of sizes exceeding main memory, communication between the fast internal memory and the slow external memory is often the performance bottleneck and algorithms and data structures designed under the assumption of a single level of memory may be meaningless. External-memory algorithms try to optimize performance by taking into account disk accesses. One can certainly use the standard main memory algorithms for data that reside on disk but their performance is often considerably below the optimum because there is no control over how the operating system performs disk accesses. On demand thrashing can be high thus resulting in an increase in response time. Although a lot of research has been done in the recent past on efficient external-memory algorithms and data structures, such work in the area of VLSI computer-aided design is limited. We have designed and implemented a practical external-memory algorithm for reporting all intersecting pairs amongst a set of orthogonal segments. The key to our success is that we take advantage of the fact that real data sets from VLSI applications tend to obey the so-called "square-root" rule, i.e. in a set of TV line segments, the expected number of line segments intersecting a horizontal or vertical scanline in a VLSI layout is O(/spl radic/ N), a fact ignored by known external-memory algorithms. Another factor that is crucial to our success is that other algorithms stores the data structures in external memory requiring I/O to access them. We reduce such disk accesses by using a clever storage scheme. Our algorithm outperforms not only a standard in-memory algorithm but also an existing external-memory algorithm for segment intersection reporting.