Linearity enhancement in a configurable sigma-delta modulator

A highly linear sigma-delta modulator for dual-standard receivers is presented. The modulator makes use of low-distortion sigma-delta modulator architecture to attain high linearity over a wide bandwidth. The dual-band modulator employs a 2/sup nd/ order single-bit sigma-delta modulator with feedforward path for GSM mode and a 4/sup th/ order modified cascaded modulator with single-bit in the first stage and 4-bit in the second for WCDMA mode. The modulator is designed in TSMC 0.18/spl mu/m CMOS technology and operates at 1.8 supply voltage. It achieves in GSM/WCDMA mode a peak SNDR of 83/75dB, a 96/84dB SFDR and an IMD3 of -93/-82dB for an OSR of 160/16.