A CMOS 16-bit 20MSPS analog front end for scanner/MFP applications

This paper presents a monolithic 16-bit analog front end (AFE) chip for CCD/CIS scanners and multifunction peripheral (MFP) systems incorporating a 16-bit analog-to-digital converter (ADC), a 3-channel high resolution correlated double sampler (CDS), a programmable gain amplifier (PGA) and an on-chip voltage reference. The proposed AFE, fabricated in a Samsung Electronics Corporation's (SEC's) 0.35 /spl mu/m CMOS process, occupies an active area of 8mm/sup 2/ and consumes 300 mW at a 3 V supply. For the full signal path (CDS-PGA-ADC), no missing code is guaranteed at a 16-bit resolution and typical differential nonlinearity (DNL) and integral nonlinearity (INL) are +1.3/-0.92 LSB and +6.7/-16.6 LSB, respectively.