Nonvolatile quantum dot memory (NVQDM) in floating gate configuration: device and circuit modeling

In this paper, we describe the physical and circuit models of a nonvolatile memory cell comprising of CdSe nanocrystals in a floating gate configuration. The floating gate voltage is computed from the ratio of capacitances between the floating gate and control gate. Threshold voltage for the 0.07 /spl mu/m channel length MOSFET is calculated using various device parameters including the effect of charge on nanocrystal quantum dots. Current voltage characteristics are obtained using BSIM3v3. The gate current is modeled based on direct tunneling between the channel and nanocrystals. Results for a 70 nm channel length device are presented.