Direct/Indirect Junction Between Channel Inversion Layer and Doped Source/Drain Region on Metal-Induced Lateral Crystallization Polycrystalline Silicon Bottom Gate TFTs

Top gate-structured thin-film transistors (TFTs) have a channel inversion region that is directly connected to the doped source/drain area. This stands in contrast with normal bottom gate-structured TFTs that have a channel inversion region on the downward facing side of the silicon layer regardless of the crystallinity. In this experiment, we fabricate a bottom gate TFT with a direct contact junction between the channel inversion layer and the doped source/drain area and subsequently analyze its electrical properties. The leakage current of direct junction structure is 7.4 times higher than indirect junction structure (indirect junction has 2.5 x 10
^-13
A of leakage current and direct junction has 1.85 x 10
^-12
A of leakage current). And we calculate the variation in the specific contact resistance according to differences in the intrinsic silicon thickness in order to confirm the effect that the intrinsic silicon thickness has on the bottom gate direct/indirect contact structure.