Lump Partitioning of IC Bipolar Transistor Models for High-Frequency Applications

A physical basis for parameter extraction of a two-lump bipolar transistor model for high-frequency applications is presented. S-parameter data taken from devices is compared to that generated from a two-lump model predicted by physical theory using 2-D finite element device simulation. Errors within 5 percent in magnitude and 5° in phase are obtained for all four S-parameters for a frequency range up to f/sub T/ and across the full current range. New physical understanding of the effects of dc current flow on high-frequency behavior of bipolar transistors is presented.