Characteristics of different structure sub-100nm MOSFETs with high-k gate dielectrics

The extensive simulations are carried out to study impact of high K dielectric both on the channel and the source/drain extension region of a typical 70nm MOSFET by the two dimensional device simulator ISE. The key factors affecting the device characteristics are investigated. The different structures of high K gate dielectric MOSFETs including SOI MOSFET and recess channel MOSFET are also simulated.