Experimental Analysis of Trade-Off Between Transistor Efficiency and Unit Gain Frequency of Nanosheet NMOS Transistors

This work presents a trade-off analysis between transistor efficiency (gm/I
D
which is proportional to the intrinsic voltage gain A
v
) and the unit gain frequency (f
T
) of the nanosheet (NSH) NMOS devices. The analyses were performed experimentally as a function of the inversion coefficient (weak, moderate, or strong inversion levels-IC) in order to determine the best operation region for optimization of both parameters. These analyses were performed with NSH NMOS for the channel length ranging from 28 nm to 200 nm. It was observed that the optimal operation point takes place in the transition between moderate and strong inversion (IC=10), where the highest value obtained for gm/I
D
x f
T
was found. In this optimum bias point the A
V
is 50 dB (L=200 nm) and 37 dB (L=28 nm) and f
T
is 7 GHz (L=200nm) and 160 GHz (L=28nm), which should be suitable for many applications.