High Temperature Influence on the Trade-off between gm/ID and fT of nanosheet NMOS Transistors with Different Metal Gate Stack

This work presents an experimental analysis of the trade-off between transistor efficiency (gm/ID) and unit gain frequency (fT) of nanosheet field effect transistors (NSFETs) with different metal gate (MG) stack, considering the influence of high temperature (T), until T=200 °C. The results are very promising for both MG stacks. The MG stack (n*) presents a high fT about 260 GHz (T=25 °C and L=28 nm) and a gm/ID about 37 V^-1 (T=25 °C and L=200 nm). The MG stack (m*) also presents very good characteristics, like a fT about 252 GHz (T=25 °C and L=28 nm) and a gm/ID about 35 V^-1 (T=25 °C and L=200 nm). From the analyses as a function of the inversion coefficient (IC), it was possible to determine that the optimal operation point occurs in the transition from moderate to strong inversion for L=28 nm and it is in strong inversion for long channel devices. In all cases, although the intrinsic voltage gain (AV) is degraded moving away from weak inversion, the degradation was not very pronounced up to the optimal operation point and considering the temperature variation, the AV presents a greater stability at the optimal point than in weak inversion.