On-the-Fly Self-Reconfiguring FPGAs for Single Event Upset Monitoring at Belle II

High Energy Physics experiments usually require radiation-tolerant electronics for on-detector operation. When possible, it is preferable to use commercial off-the-shelf components. For purely digital functions, such as data aggregation, processing and transfer, static RAM-based Field Programmable Gate Arrays (SRAM-based FPGAs) are increasingly being used on outer sub-detectors. While these devices offer great advantages in terms of flexibility and performance, they pose important issues related to single-event upsets (SEUs) in their configuration. These upsets need to be corrected, i.e. scrubbed, and their rate is valuable information for choosing the proper mitigation strategy. If possible, dedicated in situ measurements should be performed to this aim. In this work, we present a system for SEU monitoring in FPGAs, which we installed in proximity of the Belle II detector at the SuperKEKB electron-positron collider of the KEK laboratory (Tsukuba, JP). As part of the system, we also describe our design of a robust-yet-flexible configuration scrubber, portable over Xilinx Virtex-5 and 7- Series FPGA families. We discuss the measured FPGA configuration error rate and the device power consumption. We compare our results across the tested FPGA families. We compare our scrubber to the Xilinx Soft Error Mitigation controller in terms of reliability by means of proton beam tests conducted at INFN Laboratori Nazionali del Sud (Catania, Italy). In order to show the flexibility of our scrubber, we briefly describe its usage in the Belle II aerogel ring imaging Cherenkov counter.