Package Design Optimization of the Fan-out Interposer System

The state of the art high-speed digital systems for artificial intelligence, 5G mobile communication, and network servers demand enormous amount of data transmission, wider bandwidth, and faster data rate than the conventional technology. This requires packages to incorporate interconnects with very high density, but to provide cost effective manufacturing process and better performance at the same time. The new hybrid package platform based on the panel level package (PLP) interposer mounted on the high density interconnect (HDI) substrate can be a promising solution for these requirements. The PLP interposer can provide fine pitch to support considerable number of signal traces while the HDI substrate can be served as relatively inexpensive interconnects after fanning-out signals out of the interposer. Another merit of the PLP interposer is to provide lower inductance from bump to package decoupling capacitors when implementing land side capacitors underneath the PLP interposer because the PLP can have thinner substrate thickness than the Ajinomoto build-up film (ABF). The ABF interposer can be an alternative to the PLP interposer. Although the ABF interposer has thicker copper and dielectric layers than the PLP interposer, it can achieve lower resistance for the required characteristic impedance of the high-speed IO. However, the presence of joint balls between the interposer and the HDI substrate can introduce additional impedance discontinuities, which can degrade the signal integrity. Hence, optimized package design and analysis are key factors for designing such package platforms. In this paper, the PLP interposer, the ABF interposer, and the conventional package are compared for the package structure and the design optimization perspectives. Each package platform topology is illustrated, its merits and risks are discussed. For the design optimization, the traces on the interposers and the substrates are described by simple T-line models while the LC model is adopted for vertical structures including vias, pads, and balls. The benefit of using the simple model is to provide the package design guide for the performance optimization of the package and to minimize the number of package design iterations. The package design improvement will be illustrated by the insertion loss, return loss, and time domain reflectometry (TDR). Our model provides an efficient way to improve package performance, and shows good correlations with the real design.