An Innovative Graphical Platform for Real Time Accurate AEI Overlay Prediction and Rework Control

In each new generation of 3D NAND devices, a greater number of layers are stacked in a device to increase the bit density. Due to the high aspect ratio of the 3D NAND structure and the etch tilt presence, the overlay for certain layers (such as channel hole) measured at ADI (after development inspection) was often not representing the final patterned overlay or AEI (after etch inspection) overlay. Not only does the etch tilt introduce the ADI and AEI non-zero offset (NZO), the NZO could also be observed between the scribe line measured overlay and the in-device overlay. Traditionally the NZO is manually characterized as a static offset by linear or high order polynomial equation. To make ADI measurements match AEI overlay, the NZO correction is applied to ADI to predict the AEI result. With such correction, wafer rework is allowed once the predicted AEI is out of spec. However, the main limitation of this traditional approach does not consider the gradual change of etching and other processes. This ignorance results in accuracy degradation of the static model in a long term view. Therefore, real-time NZO characterization for accurate AEI prediction at ADI phase is strongly needed for the increasingly tight overlay requirement. But it is impossible to manually maintain and refresh these NZO compensations in real-time, especially for high volume production. In this paper, a real-time accurate AEI overlay prediction method will be introduced. It is based on the latest generation 5D Analyzer Workflow, a highly customizable and programmable platform, which provides a graphical and intuitive interface for IC manufacturers to design real-time workflows to control overlay. Keywords: 3D NAND, Overlay, Real-time NZO.