Mitigation of Space-Charge-Modulation in 800-V JFET for HV Start-up Circuit Toward High ON-BV Performance

In this work, a high-voltage (HV) junction field effect transistor (JFET) with voltage class extended to 800 V is proposed, which obtains a satisfactory on-state breakdown voltage (ON-BV) performance. For the traditional HV JFET, ON-BV is much lower than OFF-BV, which cannot meet the requirement for the application of high voltage start-up circuit. In pursuit of a high ON-BV and making it close to OFF-BV, a dilute-doped resistance region is introduced in the HV JFET to mitigate space-charge-modulation (SCM) effect without additional mask and area. By appropriately increasing the dose of Deep N-Well (DNW), ON-BV can be further increased without degrading OFF-BV. At last, the proposed JFET obtains a high OFF-BV of 900 V and a high ON-BV of 965 V without sacrificing the competitive current capacity above 0.11 mA/μm. Besides, the mechanism of power loss (P
LOSS
) induced by substrate current (I
SUB
) and gate current (I
Gate
) during charging process is also revealed, which is associated with SCM. Benefit by the mitigation of SCM, I
SUB
+I
Gate
is reduced significantly in the proposed structure.